Alexander Schneider Banner

SemIsrael Tech Webinar 22-2-2022

8/3/2022

Leveraging High Speed Functional Serial Interfaces For Testing & Monitoring – Tal Kogan, Synopsys

7/3/2022

On Chip FPGA: The Other Compute Resource by Andy Jaros, VP Sales and Marketing, Flex Logix

7/3/2022

Introduction to RISC-V Processor Verification Methodology – Larry LapidesVP Sales, Imperas Software

7/3/2022

224Gbps – The Next Big Step in Data Rates by Clint Walker, VP Marketing, Alphawave IP

7/3/2022

Heterogeneous Integration: Trends and Readiness by Mike Kelly, VP, Adv Package & Technology, Amkor

7/3/2022

Managing FPGA Resources as Virtualized Accelerator Blocks – Kent Orthner, VP Architecture, Achronix

7/3/2022

Analog Design Flow and Porting: an Overview by Milos Capin, Analog Engineer, HDL Design House

7/3/2022

Selecting the Right High Bandwidth Memory by Frank Ferro, Sr Dir Product Marketing, Rambus

7/3/2022

An Efficient Design Flow For IC Power Module Design by Nikola Kontic, Solution Architect, Zuken

7/3/2022

Principles for Scalable Yield for Fabless Companies by John O’Donnell, Founder & CEO, yieldHUB

7/3/2022

Change of Contact Resistance of a Probe Pin Socket in HTOL by Bernhard Stolz, Yamaichi Electronics

7/3/2022

Enabling Digital Transformation in Electronic Design with Cadence Cloud by Carsten Heinelt, Cadence

7/3/2022

Design Beyond Standards: IPaaS (IP-as-a-Service) – by Siddharth Katare, HCL Technologies

GOLD PARTNERS