Veloce proFPGA CS – FPGA-based Prototyping with AMD VersalVP1902 Enables New Use Modes, by Juergen Jaeger, Director of Prototyping Product Strategy, Siemens EDA
With the AMD VersalVP1902 FPGA device, delivering double the capacity of previous FPGAs, you unlock a whole new level of performance and cost-effectiveness. In this webinar, hear how Siemens’ Veloce proFPGA CS prototyping platform can improve your FPGA prototyping efficiency, productivity and expand use modes.
Map more of your design onto a single chip
Run faster than ever before
Reduce the cost per gate by 50% or more
Learn how to map and debug much larger designs into the multi-FPGA Veloce proFPGA CS platform by taking advantage of the powerful VPS (Veloce Prototyping Software) tool suite.
Who Should Attend
Verification engineers and managers
Prototyping engineers
Embedded software development engineers
System architects and verification engineers
HW/SW integration engineers
BIO:
Juergen Jaeger is the director of prototyping product strategy for Siemens EDA. Prior to joining Siemens EDA, Juergen was director of product management at Cadence Design Systems, responsible for all FPGA-based prototyping activities. Prior to that he worked at Synopsys via the acquisition of Synplicity where he was the marketing director for prototyping products. Before Synplicity he was product marketing manager for the IKOS V-Station hardware emulation systems for several generations including product launches. Juergen has a master’s degree in electrical engineering from the technical college in Kaiserslautern, Germany. Juergen spent the first part of his career in engineering and application engineering in Germany.
More info:
https://www.sw.siemens.com/en-US/
juergen.jaeger@siemens.com
