Synopsys and TSMC Streamline Multi-Die System Complexity with Unified Exploration-to-Signoff...
Heterogeneous integration and the use of chiplets and extended package-level silicon integration are the logical outcome of several factors affecting the integrated circuit (IC) industry’s drive towards higher performance at minimum total product cost. A chiplet is considered one of several functional blocks which would normally reside inside of a system on chip (SoC) design. Common chiplets are input/output (I/O) die and central processing unit (CPU) or compute chiplets. To further refine its capabilities to address the chiplet-based heterogeneous integration approach, Amkor has developed several key packaging technologies to permit several chiplets to be integrated into one product package. Additionally, these chiplet blocks may also be integrated with dedicated ASICs and memory into a single IC package. These end products include high-density multi-die offerings which use a conventional IC package substrate and Flip Chip ball grid array (FCBGA) packages as well as very fine-line constructions such as 2.5D TSV and High-Density Fan-Out (HDFO) offerings. The silicon architectural flexibility, IP reuse, reduced time-to-market and lower overall cost continue to drive innovations as Amkor continues to deliver advances in heterogeneous IC packaging to meet the needs of a diverse set of chiplet-based designs.
Mike joined Amkor in 2005 and has led package developments for EMI shielding, thermally enhanced packages, sensors and high density MCM packages including 2.5D TSV and high-density fan-out (HDFO). He has worked in electronics and IC package design and manufacturing for 25 years, managing projects ranging from polyester flexible circuits to eutectic flip chip, IC package design and signal integrity. Mike has more than 40 patents in the field and holds master’s degrees in mechanical and chemical engineering.
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