Synopsys Boosts 5G SoC Development Productivity with New RF Design...
To drive significantly greater productivity and efficiency for increasingly complex chip designs, Synopsys, Inc. (Nasdaq: SNPS) today announced a new cloud-optimized electronic design automation (EDA) deployment model that delivers unparalleled levels of chip and system design flexibility via a single-source, pay-as-you-go approach. Synopsys Cloud provides access to the company’s cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to address higher levels of interdependencies in chip development.
Single-Source Model for EDA and Microsoft Azure Infrastructure Delivers Flexibility with Pay-Per-Use Approach for Demanding Chip Design and Verification Needs
“Semiconductor companies are increasingly challenged to quickly deliver both complex functionality and energy efficiency to meet growing requirements for more compute,” said Mark Papermaster, executive vice president and CTO, AMD. “AMD is delivering high-performance processors across a wide range of workloads. Innovative approaches like Synopsys Cloud built on the Microsoft Azure HBv3 cloud platform – now powered by the latest 3rd Gen AMD EPYC™ Processors with 3D V-Cache™ technology – can provide access to optimized compute and EDA tools in the cloud, further adding to our innovative chip design capabilities.”
Flexibility to Address Dynamic Chip Design and Verification Workloads
Chip development in the cloud represents a way forward for an industry grappling with exploding computational demands along with continued time-to-market pressure. From innovative design houses to large systems companies to small startups, more chipmakers are migrating workloads to the cloud to take full advantage of the faster time-to-results, enhanced quality-of-results and better cost-of-results that cloud-based design and verification technologies provide. It has, however, become more challenging to forecast compute needs, leading engineers to underestimate the compute and EDA resources they need while experiencing growing systemic complexity.
Collaboration with Microsoft Azure to Enhance Chip Development with SaaS Approach
In recent years, chip development teams began leveraging a “bring your own cloud” (BYOC) approach offered by Synopsys and other EDA vendors, where chip development teams are required to source compute infrastructure from public cloud service providers and are frequently constrained by pre-defined design and verification capacity. Synopsys is working closely with its preferred cloud partner, Microsoft, to transform the landscape through a software-as-a-service (SaaS) chip development solution on the Microsoft Azure cloud computing platform. With the SaaS approach, customers can directly access and pay as they go for cloud compute resources and for any Synopsys cloud-enabled design and verification product.
Customers who already have cloud resources through a BYOC model can also take advantage of Synopsys Cloud and its pay-per-use cloud-enabled EDA tools. The collaboration with Microsoft Azure will enable design teams to benefit from flexibility and faster time-to-market, addressing today’s systemic complexities in chip design and verification. Read more from Microsoft about this collaboration and its benefits.
Streamlining the Foundry Collateral Process
Synopsys is working together with major foundries to streamline access to required manufacturing collateral for use with its cloud-optimized products. The roadmap for the collaboration aims to provide customers with a flexible, cloud-optimized approach for accessing and managing foundry collateral.
“Our new Synopsys Cloud offering promises to be transformative, providing designers the ability to scale up or down in response to their dynamic chip design and verification needs,” said Sassine Ghazi, president and chief operating officer at Synopsys. “As more design flows incorporate AI, requiring even more resources, the virtually unlimited compute and EDA access we’re providing will lay the foundation for new levels of semiconductor innovation while delivering a flexible, secure chip development environment for future demands.”
Rani Borkar, Corporate Vice President, Azure Hardware Systems & Infrastructure at Microsoft added, “Addressing systemic complexity along with interdependent design flows in chip design requires more compute and EDA resources than ever before. Microsoft Azure continues to scale its high-performance computing infrastructure with the availability, affordability and capacity to handle advanced chip design and verification workloads. The Synopsys Cloud software-as-a-service solution has been purpose-built on Microsoft Azure for EDA workloads, delivering a flexible design and verification environment to foster the productivity that design teams need.”
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