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Synopsys Delivers Certified EDA Flows and High-Quality IP for Intel 16 Process

Easing the design of chips for power- and space-constrained applications, Synopsys, Inc. (Nasdaq: SNPS) today announced its digital and custom design flows, powered by the Synopsys.ai™ full-stack AI-driven EDA suite, are certified for the Intel Foundry Services (IFS) Intel 16 process. Used alongside high-quality Synopsys Foundation IP and Interface IP, which have been optimized for the same IFS technology, customers can confidently meet or beat design targets for advanced mobile, RF, IoT, consumer, storage and military, aerospace and government (MAG) systems.

The collaboration highlights Synopsys’ key role in facilitating the design and verification of chips for mission-critical applications. Within the IFS Accelerator USMAG Alliance, Synopsys is part of a trusted ecosystem fostering assured chip design and production on advanced processes. The efforts of the two companies also support the U.S. Department of Defense’s implementation of the Microelectronics Commons, a national network established under the CHIPS Act to provide direct pathways to commercialization for U.S. microelectronics researchers and designers from “lab to fab.”

“While enabling our mutual customers to achieve silicon success in their designs, Synopsys and IFS are also laying the groundwork to help revitalize the semiconductor industry,” said Shankar Krishnamoorthy, GM of the Synopsys EDA Group. “With our certified EDA flows and silicon-proven IP for the Intel 16 process, we are advancing the smart everything world with greater intelligence and connectivity.”

“With its solutions for process node enablement and design and development experience with Intel manufacturing, Synopsys has been an ideal collaborator for Intel Foundry Services enablement,” said Rahul Goyal, vice president and GM for Intel’s Product and Design Ecosystem Enablement Group. “Mutual customers can achieve higher silicon utilization for their consumer, aerospace and government SoC designs using Synopsys EDA flows and IP on our Intel 16 technology.”

Stress-Tested and Ready-to-Go Flows
Collaborating closely with IFS, Synopsys has enhanced its digital and custom design flows for more efficient routing and optimization of smaller chip area while reducing power consumption. A customized PPA-driven design reference flow—vetted through test chip tape-outs that stress-test each tool from design through signoff— delivers numerous productivity accelerators and enables faster time to successful silicon for mutual customers. In addition, Synopsys Custom QuickStart Kits deliver proven methodologies for higher quality and fast turnaround times.

Intel 16 is a gateway to FinFET technology from planar nodes, providing great performance with fewer masks and simpler back-end design rules. Intel 16 offers industry-leading RF and analog capability, making it well suited for storage controller, RF (Wi-Fi, BT), mmWave, MAG and consumer applications.

Availability
The Synopsys Digital Design Family, Synopsys Custom Design Family and Synopsys Interface and Foundation IP are available now for advanced IFS processes.

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