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Responding to significant market growth in high-performance computing, AI, mobile and automotive applications, Synopsys, Inc. (Nasdaq: SNPS) today announces a collaboration with Samsung to develop optimized digital and custom design flows on Samsung Foundry’s SF2 process. This collaboration builds on the success of Synopsys’ certified digital and custom design flows for Samsung Foundry’s SF3 process. The significant investment by Synopsys across the Synopsys.ai™ full stack AI-driven EDA suite allows mutual customers to accelerate advanced process designs, further differentiate their SoCs and speed time to market. In addition, with Synopsys AI-driven Design Technology Co-Optimization solution, a catalyst for rapid node bring-up, Samsung test cases consistently outperformed power, performance and area (PPA) goals for its advanced process compared to optimization without the use of AI.
Optimized Digital and Custom Design Flows Powered by Synopsys.ai EDA Suite Speed Development of Designs for Advanced Samsung Processes
“The demand for ever-better PPA and energy efficiency is non-stop as we address compute-intensive workloads for mobile, high-performance computing and AI applications,” said Sanjay Bali, vice president of Product Management and Strategy for the EDA Group at Synopsys. “Through our decades-long EDA and IP partnership, Synopsys and Samsung Foundry have enabled our mutual customers to design differentiated products, while achieving compelling PPA advantages on Samsung Foundry’s advanced technologies.”
“Samsung Foundry’s optimized SF2 and SF3 GAA technology pushes the performance limits of FinFETs, delivering compelling PPA improvements for advanced system-on-chip (SoC) designs,” said Sangyun Kim, vice president of Foundry Design Technology Team at Samsung Electronics. “The strong collaboration with Synopsys on certified digital and custom design flows, powered by Synopsys.ai, helps mutual customers achieve the best quality-of-results and accelerates node migration for digital and analog designs on Samsung advanced processes.”
Generating More from Moore’s Law
As more challenging workloads put greater demands on chips, designers must stretch the limits of Moore’s law to achieve iteratively better silicon outcomes. Aggressive schedule and budget considerations are adding to the pressure.
The Synopsys EDA digital and custom design flows have been certified on Samsung Foundry’s advanced processes, with interoperable process design kits (iPDKs), Fusion QuickStart Implementation Kits, and Custom QuickStart Kits delivering proven methodologies for higher quality and fast turnaround times. In addition, the Synopsys.ai AI-driven EDA suite boosts productivity and enables rapid migration of digital and analog designs across Samsung process nodes.
Synopsys digital and custom design technology are available now for Samsung Foundry’s 3nm GAA technology.