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Samsung Foundry Adopts Cadence Liberate Trio Characterization Suite for 3nm Production Library

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced Samsung Foundry successfully used the Liberate™ Trio Characterization Suite to deliver 3nm production libraries that meet the requirements for a range of application areas. The unified Cadence® library characterization system provided a powerful combination of characterization and library validation, enabling Samsung to reduce turnaround time and improve productivity versus previous nodes.

Ideal for the Samsung 3nm advanced-node technologies characterization, the Liberate Trio suite empowered the Samsung Foundry team to become much more efficient and speed time to market.

The Samsung team benefitted from the following key capabilities:

  • Advanced unified production-proven characterization flow: Combined nominal, statistical characterization and validation runs eliminated the need for Samsung to manage multiple runs, improving performance and overall efficiency.
  • Unified methodology for LVF generation: The next-level statistical characterization across multiple voltage profiles covered all corners adaptively and automatically and delivered an LVF format that captured process variations for the most advanced nodes, providing Samsung with significant runtime savings.
  • Latest generation multi-PVT flow: Samsung leveraged the latest integrated version of the Liberate characterization flow, where Liberate intelligently shared the circuit analysis results and generated collateral for SPICE simulation among multiple PVT corners , which further reduced overhead and runtime.
  • Machine learning (ML) capabilities: The ML algorithms enabled Samsung to reduce runtime on its most challenging cells while meeting accuracy criteria.
  • Scalable, reliable cloud-ready suite: Optimized for the cloud with robust job management, recovery and incremental run capabilities, the Liberate Trio suite allowed Samsung to scale their project to a large CPU farm, reducing the time needed to characterize large libraries.

“We selected the Liberate Trio Characterization suite for 3nm designs and above because it allowed us to meet our next-generation requirements, aggressive time-to-market windows and design enablement quality goals,” Sangyun Kim, vice president of the Design Technology Team at Samsung Electronics. “The suite provided our team with highly accurate characterization while significantly reducing our delivery timeline, hardware requirements and cost.”

“Cadence and Samsung Foundry have worked together on design enablement for many process generations, and it was a natural extension for the Samsung Foundry team to adopt the Liberate Trio Characterization suite to address all aspects of standard cell library characterization and validation,” said Michael Jackson, corporate vice president, R&D in the Digital & Signoff Group at Cadence. “Our latest design enablement collaboration enabled Samsung Foundry to benefit from the tightly integrated Cadence design flows and meet both time-to-market and quality goals for their most challenging libraries.”

The Liberate Trio Suite is part of the broader digital full flow, which supports the company’s Intelligent System Design™ strategy and enables SoC design excellence. For more information on the Liberate Trio Suite, please visit

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