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Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology

Mixel®, a leading provider of mixed-signal intellectual property (IP), announced today that its MIPI® C-PHYSM/D-PHYSM Combo IP is now available on STMicroelectronics’ 40nm Low Power process technology (CMOS040LP). The MIPI C-PHY IP supports the v1.2 specification, and the MIPI D-PHY IP supports the MIPI D-PHY v2.1 specification.

Mixel achieves first time silicon success with its MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology

Mixel’s MIPI C-PHY/D-PHY combo IP is a high-frequency, low-power, low-cost, physical layer. The MIPI C-PHY IP supports a speed of 3.5Gsps per trio, an equivalent data rate of 7.98 Gbps/trio, and in MIPI D-PHY mode, the IP supports speeds up to 2.5Gbps per lane. With up to three trios in C-PHY and up to four lanes in D-PHY, the combo IP reaches an aggregate bandwidth of 23.94Gbps and 10Gbps in their respective modes.

There are multiple configurations of this combo IP available, including area optimized transmitters or receivers, supporting either the MIPI Camera Serial Interface 2 (CSI-2®) or MIPI Display Serial Interface 2 (DSI-2SM) as well as a universal version of the IP which supports all configurations. In addition, Mixel also offers its patented RX+ and proprietary TX+ versions of its MIPI receiver and transmitter IPs. These unique configurations allow full-speed, in-system testing without the area penalty of a universal configuration and are designed for safety sensitive applications such as automotive, medical, and other use cases where safety and reliability are critical.

Mixel’s IP achieved first-time silicon success on a test chip manufactured in ST’s 40nm low power process technology and other MIPI IP configurations are in development on another ST process technology.

“Mixel has been a valued Contributor member of MIPI Alliance and supporter of its specifications since 2006,” said Sanjiv Desai, MIPI Alliance chair. “By offering their silicon-proven MIPI IP in ST’s 40nm low power process technology, Mixel is actively playing a role in the growth of the MIPI ecosystem.”

This combo IP, silicon-proven at 4.5Gsps per trio in C-PHY mode and 4.5Gbps per lane in D-PHY mode, was first announced in September 2020.

“We worked very closely with the Mixel Engineering teams from pre-sales through silicon validation,” Pascal Mellot, Imaging System & Silicon Products Director at STMicroelectronics. “We are impressed by the breadth of their knowledge and outstanding level of support and have enjoyed their constructive and responsive attitude. Achieving first-time silicon-success in this ST process is testament to Mixel’s engineering excellence and their long-proven methodology. We are looking forward to future collaborations with Mixel.”

Mixel was the first IP provider to silicon prove the first generation of MIPI C-PHY/D-PHY combo IP in 2016.

“Achieving first-time silicon-success in ST’s process with this complex IP was only possible through the close collaboration between our teams, and an indication of ST’s process robustness and the excellence of Mixel engineering and methodology,” said Ashraf Takla, Founder and CEO of Mixel. “Expanding the availability of our MIPI IP in another ST process technology is helping expand IC development of our mutual customers in Europe and across the world.”

Availability:

Mixel MIPI C-PHY/D-PHY Combo IP is available now on the STMicroelectronics 40nm Low Power process technology.

Additional Resources:

For more information on Mixel’s IP portfolio, please visit https://mixel.com/ip-cores.

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