Partners PRs

Axelera AI, the leading provider of high-performance, ultra-efficient edge AI solutions, and Andes Technology (TWSE: 6533), a premier supplier of high-efficiency 32/64-bit RISC-V processor cores, today announced a strategic partnership. Axelera AI has integrated the AndesCore™ AX65 Out-of-Order RISC-V processor into its newly unveiled Europa AI Processing Unit (AIPU) to provide a powerful, open-standard foundation for next-generation computer vision and generative AI at the edge.

As AI models—particularly Large Language Models (LLMs) and high-resolution vision transformers—move from data centers to edge environments, the need for a balanced architecture of high-performance control and specialized AI acceleration has reached a critical point. The Europa platform addresses this by combining Axelera’s proprietary Digital In-Memory Compute (D-IMC) technology with the sophisticated control capabilities of the Andes AX65. With 629 TOPS and integrated pre- and post-processing, Europa extends AI capabilities to edge servers and unlocks AI applications that more compact devices can’t handle. It consolidates workloads across facilities, deploys robotics and autonomous systems, and runs complex models locally without datacenter infrastructure.

The Synergy: D-IMC Meets Out-of-Order RISC-V

The Europa AIPU delivers a staggering 629 TOPS of peak performance. While Axelera’s D-IMC cores handle 99% of the heavy lifting for neural network inference, the AndesCore™ AX65 serves as the primary “brain” of the chip.

Key benefits of this integration include:

• Advanced Control Flow: The AX65’s 13-stage, 4-wide out-of-order execution can handle multiple complex pre- and post-processing tasks in parallel, such as frame management and result formatting, with significantly lower latency than traditional in-order cores.
• Linux-Ready Performance: Compliant with the RVA22 profile, the AX65 provides the robust architectural features required to run full Linux distributions, simplifying software deployment for developers.
• Power Efficiency: By leveraging the AX65’s superior performance-per-watt, Europa maintains its market-leading efficiency, delivering up to 3x the performance-per-watt of legacy GPU-based solutions.

“The integration of the Andes AX65 into our Europa architecture marks a significant milestone in our mission to democratize AI,” said Giuseppe Garcea, Director of Silicon & Co-founder of Axelera AI. “By pairing our disruptive D-IMC technology with Andes’ world-class RISC-V expertise, we are providing our customers with a platform that is not only incredibly fast but also highly flexible and easy to program.”

“We are thrilled to see our high-performance AX65 core at the heart of Axelera AI’s groundbreaking Europa processor,” said Dr. Charlie Su, President and CTO of Andes Technology. “The AX65 was designed to meet the rigorous demands of infrastructure and high-end AI SoCs. This partnership demonstrates how the RISC-V ecosystem is now capable of competing at the highest levels of performance, enabling a new era of edge intelligence.”

Availability

The Europa AIPU, featuring the AndesCore™ AX65, is currently sampling to lead customers.