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Achronix Semiconductor Corporation, a global leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, is thrilled to announce that the Achronix Network Infrastructure Code (ANIC) includes 400 Gigabit Ethernet (GbE) connectivity. ANIC is a suite of flexible FPGA IP blocks optimized to accelerate high-performance networking pipelines for Speedster®7t FPGAs and the VectorPath® Accelerator Card. Achronix FPGA products and IP networking solutions offer the highest-performance for the most demanding applications.
Achronix Network Infrastructure Code (ANIC) offers 400 GbE connectivity
As the demand for high-speed data processing continues to grow exponentially, Achronix remains at the forefront of innovation, delivering cutting-edge solutions to address the evolving needs of the networking industry. Integrating 400 GbE and PCIe Gen 5.0, Achronix empowers data center operators, cloud service providers, and telecommunications companies to create SmartNIC solutions with unprecedented performance, scalability, and flexibility.
The key features and benefits of the ANIC include:
“We are excited to unveil the integration of 400 GbE into our ANIC,” said Steve Mensor, VP of Marketing for Achronix Semiconductor Corporation. “This breakthrough achievement underlines our commitment to providing our customers with the most advanced, high-performance networking solutions. With the increased speed, bandwidth, scalability, and data acceleration offered by ANIC, customers can unlock new levels of performance and address the ever-growing demands of modern data centers and communication networks.”
ANIC modular IP runs on Speedster7t AC7t1500 FPGAs and VectorPath S7t-VG6 Accelerator Cards offering the industry’s highest performance for networking and compute acceleration applications. The Speedster7t architecture includes a revolutionary 2D network on chip (2D NoC) that provides 20 Tbps of total bandwidth. The 2D NoC offers high-speed connectivity between the FPGA fabric and the high-speed interfaces including 400 GbE, PCIe Gen 5.0, GDDR6, and DDR4/5. Additionally, Speedster7t FPGAs have machine learning processors (MLPs) distributed across the FPGA fabric. Each MLP is a highly configurable, compute-intensive block, with up to 32 multipliers that support integer formats from 4 to 32 bits and various floating-point modes including direct support for TensorFlow’s bfloat16 format and block floating-point (BFP) format.
Contact Achronix for a demonstration of ANIC with 400 GbE and PCIe Gen 5.0 capabilities.