Siemens and TSMC collaborate to help mutual customers optimize designs using foundry’s newest advancements
Siemens’ Calibre platform now certified for IFS’ Intel 16 process technology
samsung intel IFS
Siemens advances intelligent custom IC verification platform with new, AI-powered Solido Design Environment
Siemens unveils Calibre DesignEnhancer for Calibre correct-by-construction IC layout optimization
Siemens expands collaboration with AWS to help IC and electronics design customers accelerate innovation
OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services
OKI IDS adopts Siemens Catapult
Siemens extends support for Samsung Foundry’s latest process technologies
siemens samsung foundry
Siemens collaborates with SPIL to deliver a 3D verification workflow for fan-out wafer-level packaging
Siemens SPIL
IP QA Best Practices, by Siddharth Ravikumar, Technical Product Manager, Solido IP Validation, Siemens EDA
Industry Outlook 2023: Four IC design megatrends to watch
Joe Sawicki
Siemens announces certifications for TSMC’s latest processes, celebrates recent achievements for Siemens and TSMC collaboration
Siemens wafer
Alps Alpine selects Siemens’ Symphony platform to verify its newest mixed-signal capacitance detection integrated circuit
High-Level Synthesis – Are You Still Missing Out? by Stuart Clubb, Technical Product Management Director, Siemens EDA
How Much Formal Verification is Enough? A Verification Method For High-Consequence Systems, by Nicolae Tusinschi, Formal Verification Solutions Product Manager, Siemens EDA
An Effective Path to Low-Power Design, by Qazi Ahmed, Principal Product Manager for PowerPro, Siemens EDA