True Circuits Attends Design Automation Conference Introduces New Synthesizable Precision PLL and Synthesizable Micro PLL and DLL and Demonstrates Silicon Proven DDR PHY
True Circuits develops and markets a broad range of industry leading PLL, DLL and DDR PHY hard macros for ICs for the semiconductor, systems and electronics industries. TCI’s robust state-of-the-art circuits, methodical and proven design strategy, and close association with the world’s leading fabs, IDMs, and design services companies allow the company to quickly and reliably create new and innovative designs in a variety of advanced process technologies.
The True Circuits DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individually, correcting skew within byte lanes. This state-of-the-art tuning acts independently on each pin, data phase and chip select value. Read data eye and gate timing are also continuously adjusted. Automatic training is included for multi-cycle read gate timing and write leveling, write data eye timing, and internal and external (on DRAM) Vref setting. Remarkable physical flexibility allows the PHY to adapt to each customer’s die floorplan and package constraints, yet is delivered and verified as a single unit for easy timing closure with no assembly required. The PHY is DFI 4.0 compliant, and when combined with a suitable DDR memory controller, a complete and fully-automatic DDR system is realized.
True Circuits’ complete family of standardized and silicon-proven clock generator, general purpose, deskew, spread spectrum, IoT and Ultra PLLs and multi-slave and multi-phase DLLs spans nearly all performance points and features typically requested by ASIC, FPGA and SoC designers. These high quality, low jitter PLL and DLL hard macros are optimized for a wide variety of interface standards, including DDR, HBM, ONFI, PCIE, Ethernet and HDMI.
True Circuits PLLs and DLLs are available for immediate delivery in a range of frequencies, multiplication factors, sizes and functions in TSMC, UMC and GlobalFoundries processes from 180nm to 7nm. They are pin-programmable, highly process tolerant and reusable. They are also easy to integrate and are fully supported, so customers can reduce both design and silicon risks.
Since 1998, True Circuits has distinguished itself as the technology leader in the timing IP space, and its PLLs and DLLs are used extensively around the world in its customers’ products with production volumes well into the billions. When only the best will do, go with the timing experts!
To learn more, visit us at www.truecircuits.com.