Siemens
Siemens transforms computational lithography for next-generation AI semiconductors with NVIDIA...
In the semiconductor industry, solving one set of problems often leads to another.
We’re seeing this now with the shift from monolithic chips to 2.5D and 3D multi-die designs. These architectures help address major challenges related to performance, bandwidth, and energy efficiency — all of which are critical for AI systems and workloads.
But a new set of problems has emerged: multiphysics.
As logic, memory, and compute are packed more tightly together and stacked in closer proximity, they are increasingly influenced by thermal, electromagnetic, and other physical effects.
Historically, these effects were often treated as secondary concerns that could be isolated, analyzed, and addressed in the latter stages of design. More recently, as advanced node and multi-die designs gained momentum and multiphysics interactions became more pronounced — and harder to predict — engineering teams have built extra margins into their designs to hedge against uncertainty.
But that approach has introduced its own set of problems.
The rising cost of overdesign
One of the industry’s traditional ways of coping with uncertainty has been to overdesign.
When engineers couldn’t fully predict how a chip would behave under real-world conditions, they compensated with extra margin. They added guardbands for timing. They built in safety buffers for power. They made conservative choices to avoid failure later.
At advanced nodes, however, overdesign is becoming too expensive.
Every added margin comes with a cost in power, performance, or area. Every conservative assumption can mean wasted silicon and lower efficiency. Those costs add up quickly.
The International Journal on Science and Technology (IJSAT) estimates the cost of overdesign — primarily driven by excessive design margins (or guardbands) to mitigate process, voltage, and temperature variations — accounts for 20% to 45% of total power penalties and 20% to 35% in wasted silicon area on advanced nodes (sub-5 nm).
These tradeoffs are even more pronounced in AI systems, where performance demands are intense and energy efficiency is critical. Teams cannot afford to leave optimization opportunities on the table simply because they don’t have enough visibility into the physical behavior of the design.
More analysis and correlation are needed. And they must come earlier.