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From Gate‑All‑Around to Complementary FETs: What’s Next in Transistor Scaling
Ravi Todi and Urmimala Roy and Xi-Wei Lin
Posted on 9/9/2026
Introduction
Two years ago, we introduced why the industry was moving to gate‑all‑around (GAA) transistors and how foundation IP co-optimized with electronic design automation (EDA) flows would be key to success. Since then, GAA has moved from early adoption into the mainstream of leading‑edge design, and the industry’s attention is already turning to what comes after it. This article revisits where GAA stands today and looks ahead to its successor, the complementary FET (CFET).
For several decades, semiconductor industry growth has followed “Moore’s law” [1], with the number of transistors doubling roughly every two years. Initially, the transistors were planar structures. Moore’s law meant that transistors continued to be smaller in dimensions, so planar transistors soon proved inefficient in controlling the flow of charge in the channel and FinFETs were introduced [2]. The “fins”, semiconductor channels protruding out of the wafer in the out-of-plane direction, have the gate covering the channel on three sides, giving the gate better electrostatic control of the channel than planar FETs. They, however, had a challenge of their own. The current carrying capacity of the transistor is proportional to the number of fins (which act as “parallel channels” between the source and the drain). That makes the effective width of the transistor quantized (in steps of fin number and associated space in the layout). Also, as FinFETs kept scaling down towards the ~3nm node, they became less efficient as an electrical switch. Near the bottom of the fin, closer to the substrate, gate control weakens, making the area susceptible to leakage. Furthermore, FinFET transistor variability increases as scaling continues, making it less suitable for 2nm node and beyond.
GAA Today: Where the Technology Stands
Beginning at around the 2nm node, the industry started transitioning to a new transistor architecture, gate-all-around (GAA). In GAA, there are nanosheets of semiconductors with the gate wrapping around them on all four sides (Figure 1), which lets the gate voltage control the charge in the channel more effectively than a FinFET.
